• 4 Posts
  • 44 Comments
Joined 2 years ago
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Cake day: June 9th, 2023

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  • I blocked NSQ bc of an active bot as a mod.

    Lemmy in general does not handle conceptual abstractions well at all. I think it is great to question the seemingly obvious subjects, and to poll user depth and intelligence regularly. I hate getting blindsided by someone asking stupid questions like this in real life and having to take the time to think out which of many angles I would like to address the issue from. I find it useful and healthy to see how others address such a question and how people respond to the various approaches. This is fundamental to the intuitive usefulness of NSQ and when that utility is hampered it effectively renders the community useless.

    I rather ineffectively volunteered to take over the community myself when I encountered poor moderation from a bot with no accountable individual to address. Instead I block the community and consider it an embarrassment to exist.








  • Need max AVX instructions. Anything with P/E cores is junk. Only enterprise P cores have the max AVX instructions. When P/E are mixed the advanced AVX is disabled in microcode because the CPU scheduler is unable to determine if a process thread contains an AVX instruction and there is no asymmetrical scheduler that handles this. Prior to early 12k series Intel, the microcode for P enterprise could allegedly run if swapped manually. This was “fused off” to prevent it, probably because Linux could easily be adapted to asymmetrical scheduling but Windows would probably not. The whole reason W11 had to be made was because of the E-cores and the way the scheduler and spin up of idol cores works, at least according to someone on Linux Plumbers for the CPU scheduler ~2020. There are already asymmetric schedulers in Android ARM.

    Anyways I think it was on Gamer’s Nexus in the last week or two that Intel was doing some all P core consumer stuff. I’d look at that. According to chips and cheese, the primary CPU bottleneck for tensors is the bus width and clock management of the L2 to L1 cache.

    I do alright with my laptop, but haven’t tried R1 stuff yet. The 70B llama2 stuff that I ran was untenable for CPU only with a 12700 with just CPU. It is a little slower than my reading pace when split with a 16 GB GPU, and that was running a 4 bit quantization version.












  • I think there is more of a need to make the fediverse feel like a community. Use my account on one service as a automatic validation to any other without requiring a formal sign up. Something like how “login with GitHub” etc. works. If these were interconnected in a low effort and seamless way, the existing community would be less of a walled garden and more of a culture. Posting video, pics, blogs, or even more forum like persistent topic threads should be seamless. In my opinion pursuing growth as a community has small returns. Becoming the most effective tool and the path of least resistance while being positive and stable is the real key to large scale growth. Updating LW is absolutely critical for Lemmy’s future IMO and is our weakest link.

    These were the thoughts that came to mind after I saw fedigrow. That name was very intuitive.